Coincidence Counting Units (CCUs)
We have 2 different versions of CCUs:
1. The
first version is based on discrete logic components. You get a set of CAD files from us which you
send to a company that will make printed circuit boards for you (about $250 for
the first 2 boards, with rapidly decreasing price per board for more
boards). You then solder together the
board and put it in a box. The
individual components for the circuit cost about $100. The circuit determines coincidences, but
counting is done by a plug-in card in your computer (cost about $650). So, the total cost for this version of the
circuit is ~$1,000 if you don’t already own the counting board.
2. The second version is based on a field programmable gate array (FPGA), basically a programmable logic IC. The nicest thing about this CCU is that there’s no circuit board to solder together—you buy a preassembled development board and simply download a program onto it. The only thing you need to build is a small adapter box to get the signals onto the board. This version also incorporates the counting—you don’t need to buy a separate plug-in card to do that. Data streams from the CCU to the computer over an RS232 serial interface (COM port). Total cost for this CCU is ~$300.
Discrete Logic CCU
Our circuit uses TTL logic chips to perform coincidence determination. It takes inputs from four detectors A, A’, B, and B’; we have specifically designed the circuit to accept the pulses output by Perkin-Elmer Single Photon Counting Modules (5V into 50 ohm, duration of 20 – 30 ns), but it would be possible to use 5V pulses from other sources as well.
The pulses first pass through pulse shortening circuitry to improve the coincidence resolution (the user can choose from 3 pulsewidths ranging from about 10 ns to 18 ns, as well as an option to leave the input pulsewidth unchanged.) At the shortest pulsewidth setting the coincidence resolution ranges from about 7 – 10 ns. The pulses then go to the logic section where AND gates determine coincidences. The outputs go to a 68-pin connector that is designed to directly interface with a National Instruments PCI-6602 8-channel counter. The user can select one of two different counting modes--one is for g(2)(0) measurements, while the other is for local realism tests. Specifically, the output channels in the two modes are:
·
g(2)(0): A, A’, B, B’, AB, ABB’, AB’,
BB’
· Local Realism: A, A’, B, B’, AB, A’B, AB’, A’B’
Our circuit also includes an oscillator which is used to gate the counter (or the user can supply their own gate via an external clock input).
Testing the prototype under real two-photon counting conditions alongside a traditional Time-to-Amplitude Converter (TAC) based system reveals that our circuit has higher throughput: while the TAC saturates at about 25,000 coincidence counts per second, our circuit shows no sign of saturation even at triple that rate (Fig. 1). This is because after each START, the TAC has a dead time (during which it cannot process subsequent events) of approximately 1 microsecond between events, while our unit has essentially no dead time.
Fig. 1. Coincidence counts are plotted as a function
of singles counts for TAC-based coincidence determinations (red circles) and
for our circuit (blue squares).
Our circuit has been laid out using a CAD system, and we have had boards fabricated by Sunstone Circuits (We gratefully acknowledge Sunstone’s support of this project.) The board and housing are shown in Fig. 2.
Fig. 2. The assembled circuit board
and housing.
The info we provide includes the CAD files and
instructions on getting boards printed, as well as a circuit schematic and full
parts list. To receive this info, please email Mark Beck beckmk at whitman.edu (replace
"at" with @) and we’ll send it to you.
This project has been a collaborative effort between Mark Beck at Whitman College and David Branning at Trinity College. We also acknowledge Sagar Bhandari (Trinity, who did the actual circuit layout), as well as David Ahlgren (Trinity) and Larry North (Whitman).
FPGA CCU
We have implemented a coincidence counting unit (CCU) on the Altera DE2 development and education board. The CCU takes inputs from up to four detectors, and has eight 32-bit counters that are used to count four singles counts and four arbitrary 2-, 3-, or 4-fold coincidences (coincidences are determined by switch settings on the DE2 board). The CCU has a coincidence-time resolution of less than 8 ns. Data is streamed from the CCU to a host computer over an RS232 serial interface.
The FPGA CCU has essentially the same performance as the discrete logic CCU – coincidence counts don’t saturate as the singles counts increase. Curves displaying coincidence counts vs. singles counts for both of our CCUs are indistinguishable (e.g., blue squares in Fig. 1).
The FPGA CCU is shown in Fig. 3.
Fig. 3 The FPGA CCU.
To implement this CCU for yourself, you buy the Altera DE2, and get the design files and instructions for downloading them onto the DE2 from us. We’ll also send you the information you need to build the adapter box and use the CCU. To receive this info, please email Mark Beck beckmk at whitman.edu (replace "at" with @) and we’ll send it to you.
This CCU was largely programmed by Jesse Lord of Whitman College (now at the Univ. of Colorado).
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webpage updated 6/7/08
beckmk at whitman.edu (replace "at" with
@)